M.S. Computer Science
Logeswaran Sivakumar
AI Optimization Engineer at Solidigm (SK Hynix) · Portland, OR · [email protected]
AI Optimization Engineer at Solidigm with 3+ years of experience on AI model performance, computer vision, and GPU software development. My work focuses on accelerating training and inference, optimizing models and systems for speed and efficiency.
During my MS at Oregon State University, my research focused on Fused PointConv, where I designed fused CUDA kernels and inverse neighborhood indexing for high-performance 3D point cloud learning.
Previously, I worked at AMD on numerical modeling for XDNA, at Samsung Labs, where I developed efficient supersampling models for mobile GPUs, and at Intel, contributing to Gaudi platforms. Above all, I consider my greatest strengths to be my creative thinking and ability to integrate ideas from various fields.
Besides AI, I like to explore algorithm optimization and computation efficiency. If you find me, talk to me about space, science, or AI. Bonus points if it involves all three.
Research interests
- AI compilers and inference runtimes: graph optimization passes, operator offload, framework backends
- GPU kernel design and fusion: CUDA, CUTLASS
- Efficient inference: quantization, memory-bound operators, occupancy
- On-device and edge AI: NPUs, mobile GPUs, framework integration
- 3D perception, point-cloud networks, and 2D/3D multi-modal fusion
- Agentic AI systems
Education
B.E. Electronics and Communications Engineering
Experience
AI Optimization Engineer, Solidigm (SK Hynix)
- Built an agentic AI system that propagates annotations from a single annotated sample.
- Optimized a multi-model GPU inference pipeline (Grounding DINO, SAM3, Kimi K3) for the Luceta suite, tuning batching and memory reuse to propagate annotations across sequences and cut manual annotation by 40%.
AI Engineer Intern, AMD
- Built a numerical modelling tool for AMD's XDNA NPU that replaces ONNX custom operator patterns with bit-accurate graph models.
Machine Learning Engineer Intern, Samsung Austin Semiconductor
- Designed a neural supersampling model inside the rendering pipeline using temporal subpass data, motion-vector warping and pixel-wise kernel prediction, gaining 0.5 dB PSNR over the competing model with 25% fewer parameters and 20% fewer GFLOPs.
- Optimized it for Samsung GPUs with TFLite and ENN delegates, quantizing FP32 to FP16 and INT8.
- Profiled kernel memory and compute intensity with the OpenCL profiler, then fused kernels to cut device handshakes and memory pressure.
Machine Learning Engineer, MulticoreWare Inc.
- Cadence: ported the SeniorAssist application to the DNA150 accelerator with XNNC, architecting a multithreaded pipeline that processes video and audio streams concurrently on Tensilica threads and runs three model inferences in ~40 ms. Benchmarked it with XNNC 2.3 on PersonDetection, PoseEstimation and DeepSpeech2.
- Intel Habana Labs: led a team building TensorFlow and PyTorch integration for training on Gaudi accelerators, offloading 30+ operators to Habana tensor cores with custom optimization passes and kernels.
- Qualcomm: optimized, ported and benchmarked EfficientNet-B0, HRNet and Faster R-CNN with TensorRT on Jetson AGX Xavier and with Qualcomm AIMET: 50% model size reduction for under 2% accuracy loss after quantization and compression.
- Synopsys: built an Android NNAPI-compliant stack with custom drivers for the ARC EV processor, offloading 10+ TensorFlow operators for on-device acceleration.
Publications
Fused PointConv: High-Performance Point Cloud Processing via Kernel Fusion and Inverse KNN Index Mapping
Selected projects
tessiq
An out-of-tree PyTorch backend for NVIDIA GPUs, with a device runtime, a torch.compile compiler with its own IR and passes, and a kernel library.
C++CUDAPythonPyTorch
cuda-breakdown
A CLI that compiles a CUDA kernel through the real toolchain and renders every stage (CUDA to PTX to SASS) with inline annotations, plus static analysis of instruction mix, FMA efficiency, arithmetic intensity and theoretical occupancy. No profiler required.
PythonCUDAnvccnvdisasm
Fused PointConv
Fused forward pipeline for PointConv with SRAM-staged intermediates and CUTLASS batched GEMMs, plus an inverse KNN index map that converts the backward pass from an atomic scatter into a conflict-free gather. 1.9× forward and 1.6× backward on an H100 at 400k points.
CUDACUTLASSPyTorch
- Distilling LLMs with RAG: Distilled Llama 3 into a T5 model with retrieval-augmented step-by-step reasoning: 67× smaller while holding task performance, including in low-data settings. Code
- Multiscale Template Matching: Scale-invariant template matching using SIFT features and a FLANN-based matcher, to locate a cropped region inside its source image across unknown scales. Code
- Stable Diffusion Playground: Image and 2D/3D video generation built on latent diffusion models. Code
- Mr. Pose: Real-time pose estimation that scores exercise form, counts repetitions and classifies the movement. Code
- CUDA Programming: Working notes and kernels from learning CUDA from the ground up. Code